Sigma Studio Version 4.2. Build 1, Rev 1755

Analog Devices Compiler for the 3rd generation SigmaDSP core.
Build date = 8/23/2018 at 9:56 AM

## Summary ##
(Note: Estimates are based on a 48 kHz sample rate)

Instructions used:
118	(out of a possible 1024 )
Modulo Data RAM used (X Memory):
29	(out of a possible 4096 )
Non Modulo Data RAM used (X Memory):
0	(out of a possible 4096 )
Parameter RAM used (Y Memory):
44	(out of a possible 1024 )

Instance                      		Mips	Inst	Data	Coeff	Other
                              			(max)
Mid EQ2                       		36	36	21	30
Beginning                     		19	19	0	1
SafeLoadCode                  		15	15	0	7
Tone1                         		5	5	7	5	using:	SineTone
End                           		5	5	0	0
Single 1                      		3	3	0	1
Input1                        		2	2	1	0
Output1                       		2	2	0	0
Output2                       		2	2	0	0

Subroutines called:
* SineTone                    		29	29	0	0
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
Total                      			118	118	29	44
----------------------------------------------------------------------------------------------------------------------------------------------------------------------
(%)                          			12%	12%	1%	4%

Files written:  
program_data.dat - load file for downloading code using ADI loader
hex_program_data.dat - load file for downloading code using microcontroller 
ParamAddress.dat - Parameter RAM locations for schematic instances
